1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device and a method of manufacturing the same, and in particular, relates to a nonvolatile semiconductor memory device having memory cells in an SOI (Silicon on Insulator) area of a semiconductor substrate partially containing an SOI structure, and a method of manufacturing the same.
2. Description of the Related Art
In a nonvolatile semiconductor memory device having a memory cell part of a general NAND structure as disclosed in Jpn. Pat. Appln. KOKAI Publication No. 2006-073939, for example, it is difficult to further reduce dimensions of memory cells. More specifically, if the channel length of a memory cell is set to about 50 nm or less, the memory cell or a transistor is more likely to malfunction due to a reduced on/off ratio of a channel current caused by the so-called short channel effect. Then, reliability, performance or quality of the entire nonvolatile semiconductor memory device deteriorates. Also, manufacturing efficiency drops due to lower yields caused by more frequent defective products. Thus, it has been difficult for a conventional nonvolatile semiconductor memory device to achieve higher integration of the entire device by making memory cells finer.